NuvoLinux.Org       Linux Kernel Hacking

di Alfonso Vacca (alfonso.vacca@nuvolinux.org) @Soft

Introduction Manifesto Documentation paths Bibliography Links Glossary Disclaimer Changelog

Glossary

A20
The "Addressing line 20" it is the x86 CPU's twenty-first electric line in the address bus.
It was introduced with the 80386 and it must be enabled to switch the CPU from real mode to protected mode.
Address space
Region of memory addresses to which can make reference the process.
Context switch
It is a mechanism that allows the CPU to archive and restore the content of its own registers (context) to allow the execution of concurrent processes.
COMA
Cache only memory architecture.
Hardware multi processor architecture constitute only of cache.
Data segment
Process memory area destined to contain the variables.
It is separated in two segments: that for the initialized data and that for the data not initialized.
Demand paging
Technique of saving of the physical memory with which the pages of virtual memory are loaded only in the moment in which they are indeed necessary.
Gate-A20
It is a ([WP01] logic gate) added to the A20 line, between the CPU and data bus, whitch allows to enable or disable the A20 line in a logical way.
Heap
Extension of the data segment used for the dynamic allocation of the memory.
Kernel
It is defined as a program or a whole of programs necessary for constituting a homogeneous interface between the hardware and the user space.
Generally speaking the kernel is that part of the OS that deals it with to make to work the hardware; its assignment is that to abstract the hardware and to do so that, for the rest of the OS, this is seen how a set of standard programming interfaces.
This means that to program in the user space is enough to know these interfaces, that are unchanged between the kernel changes, without worrying about the hardware architecture of the system.
Kernel mode
Operational formality of the CPU that foresees a level of privileged access to the system resources; this allows to implement a safety mechanism at hardware level.
Kernel space
Logical division of the OS; with this term the whole area of influence of the kernel is pointed out, therefore it is used to point out the kernel space as compote from the kernel and from the hardware.
Linear address space
It is a memory space addressable by CPU; if paging is not used, linear address space dovetail to physical address space.
linux-gate.so.1
It is not a library but a Dynamic Shared Object exposed by the kernel at a fixed address in the process' memory.
MM
Look at memory manager.
Memory manager
Subsystem of the kernel that has the assignment to manage the virtual memory, the paging, the swap, the cache as well as the protection of the memory.
MMU
Memory management unit, hardware component that deals it with the management of the memory access operations required by the CPU.
Among the assignments of the MMU there is the conversion of virtual memory address into physical addresses, the protection of the memory with the separation of the areas for the processes, the control of the cache and the management of the activities of the memory as shared resource.
Multitasking
Mechanism to manage concurrent acess to system resources by different processes.
([WP08] multitasking)
Nonpreemptive
Look at preemptive.
NUMA
Non-Uniform Memory Access.
Multy processor architecture hardware in which the times of access of the processors to the physical RAM depend on their position in comparison to the same RAM.
PAE
Page Address Extention, CPU's functionality (from the Pentium Pro) that increases the dimension of the hardware address from 32 to 36 bits allowing to increase the usable physical RAM from 4GiB to 64GiB; this mechanism, however, leaves unchanged to 32 bits the space of virtual addressing.
Paging
Mechanism for virtual memory management through subdivision of the address space in pages with the purpose to facilitate its management.
Page frame number
Univocal number of identification assigned by the MM to the pages of virtual memory.
PFN
Look at page frame number.
Physical address space
Address range that CPU can generate on its address bus.
Preemptive
Process management mechanism used by the process scheduler that periodically checks from how much time a single process uses the CPU with the purpose to fairly distribute this resource among the active processes.
Contrarily, in the systems that adopt a nonpreemptive scheduler, the scheduler begins working only when a process voluntarily releases the CPU.
Process
Look at task.
Registers
These are memory registers embedded in the CPU ([WP03] Processor register) used to store different types of data, often used by tasks, to speed up their execution.
SMP
Symmetric MultiProcessing.
Multi processor hardware architecture in which all the CPUs are connected to a single shared memory area.
Standard C library
C language base libraries that opportunely contain in an unique framework all the base functions of the kernel and all the system call remapped.
Stack
Part of the process memory containing the information for the management of the return of a function called by the process itsel.
Task
It represents the context in which an istance of the program is performed; it can be considered as a program in action.
Text segment
Part of the memory of the process destined to contain the executable code of the process itself, of the libraries and the constants.
UMA
Uniform Memory Access.
Multi processor hardware architecture in which the CPUs share the physical memory in a uniform way.
User mode
CPU's operational modality that foresees a level of non privileged access to the system's resources; this allows to implement an hardware level safety system.
User space
Logical division of the OS; with this term is pointed out the whole part to direct contact with the user.
Here they find position all the service programs for the user and all the programs that, besides the kernel, compete to the construction of the OS.
Virtual address space
Look at virtual memory.
Virtual memory
Sophisticated mechanism through which the MM furnishes to the processes a space of linear virtual addressing called virtual address space.

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General revision: 4.0.0 (Mon, 31 May 2010 14:10:46 +0200)